Header Only - DO NOT REMOVE - Extreme Networks
Solved

X460-G2 cpu type

  • 23 October 2019
  • 3 replies
  • 498 views

Userlevel 2
Badge

Hello Hub,

 

I need to know what exact type of CPU is used in Summit X460-G2 series.

DataSheet states only it is 64-bit MIPS Processor, 1GHz clock.

At least I have to know how many cores CPU has.

 

 

BEST REGARDS

Robert

icon

Best answer by Necheporenko, Nikolay 23 October 2019, 14:20

Hi Robert,

 

All info is below


BusyBox v1.13.4 (2019-04-17 12:00:48 EDT) built-in shell (ash)
Enter 'help' for a list of built-in commands.

/exos/bin $ cat /proc/cpuinfo
system type : CUST_EXTR_EBB6100 (CN6120p1.1-1000-SCP)
processor : 0
cpu model : Cavium Octeon II V0.1
BogoMIPS : 2000.00
wait instruction : yes
microsecond timers : yes
tlb_entries : 128
extra interrupt vector : yes
hardware watchpoint : yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented :
shadow register sets : 1
core : 0
VCED exceptions : not available
VCEI exceptions : not available

processor : 1
cpu model : Cavium Octeon II V0.1
BogoMIPS : 2000.00
wait instruction : yes
microsecond timers : yes
tlb_entries : 128
extra interrupt vector : yes
hardware watchpoint : yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented :
shadow register sets : 1
core : 1
VCED exceptions : not available
VCEI exceptions : not available

/exos/bin $

Best Regards,

Nikolay

View original

3 replies

Userlevel 4

Hi Robert,

 

All info is below


BusyBox v1.13.4 (2019-04-17 12:00:48 EDT) built-in shell (ash)
Enter 'help' for a list of built-in commands.

/exos/bin $ cat /proc/cpuinfo
system type : CUST_EXTR_EBB6100 (CN6120p1.1-1000-SCP)
processor : 0
cpu model : Cavium Octeon II V0.1
BogoMIPS : 2000.00
wait instruction : yes
microsecond timers : yes
tlb_entries : 128
extra interrupt vector : yes
hardware watchpoint : yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented :
shadow register sets : 1
core : 0
VCED exceptions : not available
VCEI exceptions : not available

processor : 1
cpu model : Cavium Octeon II V0.1
BogoMIPS : 2000.00
wait instruction : yes
microsecond timers : yes
tlb_entries : 128
extra interrupt vector : yes
hardware watchpoint : yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented :
shadow register sets : 1
core : 1
VCED exceptions : not available
VCEI exceptions : not available

/exos/bin $

Best Regards,

Nikolay

Userlevel 2
Badge

So it’s 2-core CPU :)

 

Thank you, Nikolay !

Userlevel 6

Got my interest so I looked up the specs on this CPU  https://www.marvell.com/documents/kl9a2vbejao1a0vr4rqr/ 

 

Reply