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  <channel>
    <title>topic C5/C3/B5/B3-Series Firmware Resolution for DMA Error reset in FAQs</title>
    <link>https://community.extremenetworks.com/t5/faqs/c5-c3-b5-b3-series-firmware-resolution-for-dma-error-reset/m-p/43034#M148</link>
    <description>Article ID: 16165 &lt;BR /&gt;
&lt;BR /&gt;
&lt;B&gt;Products&lt;/B&gt;&lt;BR /&gt;
C5-Series; firmware 6.42.10.0016 through 6.61.12.0005, 6.71.01.0067 through 6.71.04.0004, 6.81.01.0027&lt;BR /&gt;
C3-Series; firmware 6.42.10.0016 through 6.61.12.0005&lt;BR /&gt;
B5-Series; firmware 6.42.10.0016 through 6.61.12.0005, 6.71.01.0067 through 6.71.04.0004, 6.81.01.0027&lt;BR /&gt;
B3-Series; firmware 6.42.10.0016 through 6.61.12.0005&lt;BR /&gt;
&lt;BR /&gt;
&lt;B&gt;Symptoms&lt;/B&gt;&lt;BR /&gt;
L2 Table parity error misreported as DMA error.&lt;BR /&gt;
DMA-type errors display in the current.log, followed by a unit reboot event.&lt;BR /&gt;
&lt;BR /&gt;
The current.log (&lt;A href="http://bit.ly/1pOU3VK" target="_blank" rel="nofollow noreferrer noopener"&gt;5487&lt;/A&gt;) displays DMA-type errors (&lt;A href="http://bit.ly/1uHxdOw" target="_blank" rel="nofollow noreferrer noopener"&gt;14007&lt;/A&gt;); for example:&lt;BR /&gt;
&lt;BR /&gt;
 &amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:10 0.0.0.0-1 SIM[89329680]: hwutils.c(4455) 37651 %% Unit 1 DMA regs:PCIMEM_START(0x055cb8a0) SBUS_START(0x07a01000) ENTRY_CNT(0x00001000) CFG(0x0004011c) SBUS_ADDR(0x07a01000) CMIC_SCHAN_CTRL(0x00000000) CMIC_DMA_STAT(0x00082012) CMIC_IRQ_STAT(0x60000102) rv(0xfffffff5) LINE(2986)&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4476) 37653 %% PCI Status for CPU=0x20a0&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4470) 37655 %% PCI Status for Device 0x14e4:0xb620=0x02a0&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4483) 37659 %% MPC85xx DMA/PCI register dump&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4502) 37661 %% DGSR(0x00000000) ERR_DR(0x80000040) ERR_ATTRIB(0x001fa001) ERR_ADDR(0x00000000) ERR_EXT_ADDR(0x00000000) ERR_DL(0x00000000) ERR_DH(0x00000000)&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4518) 37663 %% 1:PEX_ERR_DR(0x00000000) PEX_ERR_CAP_STAT(0x00000000) PEX_ERR_CAP_R0(0x00000000) PEX_ERR_CAP_R1(0x00000000) PEX_ERR_CAP_R2(0x00000000) PEX_ERR_CAP_R3(0x00000000)&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: broad_hpc_drv.c(2686) 37669 %% _soc_xgs3_mem_dma: L2_ENTRY.ipipe0 failed(NAK), unit 1&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: broad_hpc_drv.c(2686) 37670 %% soc_l2x_thread: Too many errors&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 DRIVER[89329680]: hwutils.c(4237) 37671 %% soc_l2x_thread unit = 1: DMA failed too many times&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4238) 37672 %% soc_l2x_thread unit = 1: DMA failed too many times&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:21 0.0.0.0-1 SIM[172323408]: hwutils.c(3223) 37673 %% Error(0x6c327800)&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:28 0.0.0.0-1 SIM[65830416]: hwutils.c(4715) 37675 %% ERROR:Code exception:Watchdog no longer being serviced.&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&lt;BR /&gt;
The current.log (&lt;A href="http://bit.ly/1pOU3VK" target="_blank" rel="nofollow noreferrer noopener"&gt;5487&lt;/A&gt;) goes on to display a task suspension line which identifies the event as one of three known varieties: &lt;UL&gt; From C5-Series &lt;A href="http://bit.ly/Yuyr5M" target="_blank" rel="nofollow noreferrer noopener"&gt;14739&lt;/A&gt;: "&lt;PRE&gt;Task C5IntProc(0x&lt;/PRE&gt;&amp;lt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;address&lt;/I&gt;&lt;/PRE&gt;&amp;gt;&lt;PRE&gt;) is suspended with error 2, creating file sysDmp&lt;/PRE&gt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;xMmmddyy&lt;/I&gt;&lt;/PRE&gt;&lt;PRE&gt;.z&lt;/PRE&gt;" 
&lt;LI&gt;From B5-Series &lt;A href="http://bit.ly/ZhdkE0" target="_blank" rel="nofollow noreferrer noopener"&gt;14793&lt;/A&gt;: "&lt;PRE&gt;Task IntProc(0x&lt;/PRE&gt;&amp;lt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;address&lt;/I&gt;&lt;/PRE&gt;&amp;gt;&lt;PRE&gt;) is suspended with error 2, creating file sysDmp&lt;/PRE&gt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;xMmmddyy&lt;/I&gt;&lt;/PRE&gt;&lt;PRE&gt;.z&lt;/PRE&gt;" 
&lt;/LI&gt;&lt;LI&gt;From C3/B3-Series &lt;A href="http://bit.ly/1p8nFr9" target="_blank" rel="nofollow noreferrer noopener"&gt;14755&lt;/A&gt;: "&lt;PRE&gt;Task CPLD_Status(0x&lt;/PRE&gt;&amp;lt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;address&lt;/I&gt;&lt;/PRE&gt;&amp;gt;&lt;PRE&gt;) is suspended with error 2, creating file sysDmp&lt;/PRE&gt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;xMmmddyy&lt;/I&gt;&lt;/PRE&gt;&lt;PRE&gt;.z&lt;/PRE&gt;" &lt;/LI&gt;&lt;/UL&gt;&lt;B&gt;Cause&lt;/B&gt;&lt;BR /&gt;
The passage of high-energy particles can trigger a table memory bit transition, which is detected as a memory parity error, which causes the table DMA to fail. The rate at which these errors have occurred is within the norms predicted to be observed in this class of silicon.&lt;BR /&gt;
&lt;BR /&gt;
The stated sequence of events will in all likelihood never occur on any given unit, but within a broad deployment of many such units, may well be experienced somewhere in the network.&lt;BR /&gt;
&lt;BR /&gt;
&lt;B&gt;Solution&lt;/B&gt;&lt;BR /&gt;
For the C5, C3, B5, or B3; upgrade to 6.61 firmware 6.61.13.0006 or higher.&lt;BR /&gt;
For the C5 or B5; upgrade to 6.71 firmware 6.71.05.0008 or higher.&lt;BR /&gt;
For the C5 or B5; upgrade to 6.81 firmware 6.81.02.0007 or higher.&lt;BR /&gt;
&lt;A href="https://extranet.extremenetworks.com/downloads" target="_blank" rel="nofollow noreferrer noopener"&gt;Release notes&lt;/A&gt; state, in the '&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Firmware Changes and Enhancements&lt;/PRE&gt;&lt;/DIV&gt;' section:&lt;BR /&gt;
&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;16086&lt;/PRE&gt;&lt;/DIV&gt;    &lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Attempt to recover from a L2 table DMA error that previously resulted in a reset with a log entry of: "soc_l2x_thread DMA failed too many times". On an L2 Table DMA failure we will now walk the table to find the corrupted entry and remove it. The expected warning message is: "warning soc_l2x_thread: Bad L2 table entry found. Recovering".&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&lt;BR /&gt;
Upon detection of a parity error, the affected table entry is removed and a set of new messages is logged; for example:&lt;BR /&gt;
&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;May 15 16:04:31 0.0.0.0-1 SIM[99694928]: broad_hpc_drv.c(2686) 710 % warning soc_l2x_thread: DMA failed. Attempting recovery&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;May 15 16:04:31 0.0.0.0-1 SIM[99694928]: broad_hpc_drv.c(2686) 711 % warning soc_l2x_thread: Bad L2 table entry found. Recovering&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&lt;BR /&gt;
Though with this fix there will be &lt;U&gt;no&lt;/U&gt; unit reset, do note that all traffic flowing through that unit will for a brief time be forwarded using the soft path (~ CPU) while the problematic table entry is being cleared.</description>
    <pubDate>Tue, 23 Dec 2014 22:43:00 GMT</pubDate>
    <dc:creator>FAQ_User</dc:creator>
    <dc:date>2014-12-23T22:43:00Z</dc:date>
    <item>
      <title>C5/C3/B5/B3-Series Firmware Resolution for DMA Error reset</title>
      <link>https://community.extremenetworks.com/t5/faqs/c5-c3-b5-b3-series-firmware-resolution-for-dma-error-reset/m-p/43034#M148</link>
      <description>Article ID: 16165 &lt;BR /&gt;
&lt;BR /&gt;
&lt;B&gt;Products&lt;/B&gt;&lt;BR /&gt;
C5-Series; firmware 6.42.10.0016 through 6.61.12.0005, 6.71.01.0067 through 6.71.04.0004, 6.81.01.0027&lt;BR /&gt;
C3-Series; firmware 6.42.10.0016 through 6.61.12.0005&lt;BR /&gt;
B5-Series; firmware 6.42.10.0016 through 6.61.12.0005, 6.71.01.0067 through 6.71.04.0004, 6.81.01.0027&lt;BR /&gt;
B3-Series; firmware 6.42.10.0016 through 6.61.12.0005&lt;BR /&gt;
&lt;BR /&gt;
&lt;B&gt;Symptoms&lt;/B&gt;&lt;BR /&gt;
L2 Table parity error misreported as DMA error.&lt;BR /&gt;
DMA-type errors display in the current.log, followed by a unit reboot event.&lt;BR /&gt;
&lt;BR /&gt;
The current.log (&lt;A href="http://bit.ly/1pOU3VK" target="_blank" rel="nofollow noreferrer noopener"&gt;5487&lt;/A&gt;) displays DMA-type errors (&lt;A href="http://bit.ly/1uHxdOw" target="_blank" rel="nofollow noreferrer noopener"&gt;14007&lt;/A&gt;); for example:&lt;BR /&gt;
&lt;BR /&gt;
 &amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:10 0.0.0.0-1 SIM[89329680]: hwutils.c(4455) 37651 %% Unit 1 DMA regs:PCIMEM_START(0x055cb8a0) SBUS_START(0x07a01000) ENTRY_CNT(0x00001000) CFG(0x0004011c) SBUS_ADDR(0x07a01000) CMIC_SCHAN_CTRL(0x00000000) CMIC_DMA_STAT(0x00082012) CMIC_IRQ_STAT(0x60000102) rv(0xfffffff5) LINE(2986)&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4476) 37653 %% PCI Status for CPU=0x20a0&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4470) 37655 %% PCI Status for Device 0x14e4:0xb620=0x02a0&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4483) 37659 %% MPC85xx DMA/PCI register dump&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4502) 37661 %% DGSR(0x00000000) ERR_DR(0x80000040) ERR_ATTRIB(0x001fa001) ERR_ADDR(0x00000000) ERR_EXT_ADDR(0x00000000) ERR_DL(0x00000000) ERR_DH(0x00000000)&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4518) 37663 %% 1:PEX_ERR_DR(0x00000000) PEX_ERR_CAP_STAT(0x00000000) PEX_ERR_CAP_R0(0x00000000) PEX_ERR_CAP_R1(0x00000000) PEX_ERR_CAP_R2(0x00000000) PEX_ERR_CAP_R3(0x00000000)&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: broad_hpc_drv.c(2686) 37669 %% _soc_xgs3_mem_dma: L2_ENTRY.ipipe0 failed(NAK), unit 1&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: broad_hpc_drv.c(2686) 37670 %% soc_l2x_thread: Too many errors&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 DRIVER[89329680]: hwutils.c(4237) 37671 %% soc_l2x_thread unit = 1: DMA failed too many times&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:11 0.0.0.0-1 SIM[89329680]: hwutils.c(4238) 37672 %% soc_l2x_thread unit = 1: DMA failed too many times&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:21 0.0.0.0-1 SIM[172323408]: hwutils.c(3223) 37673 %% Error(0x6c327800)&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Apr 8 06:35:28 0.0.0.0-1 SIM[65830416]: hwutils.c(4715) 37675 %% ERROR:Code exception:Watchdog no longer being serviced.&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&lt;BR /&gt;
The current.log (&lt;A href="http://bit.ly/1pOU3VK" target="_blank" rel="nofollow noreferrer noopener"&gt;5487&lt;/A&gt;) goes on to display a task suspension line which identifies the event as one of three known varieties: &lt;UL&gt; From C5-Series &lt;A href="http://bit.ly/Yuyr5M" target="_blank" rel="nofollow noreferrer noopener"&gt;14739&lt;/A&gt;: "&lt;PRE&gt;Task C5IntProc(0x&lt;/PRE&gt;&amp;lt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;address&lt;/I&gt;&lt;/PRE&gt;&amp;gt;&lt;PRE&gt;) is suspended with error 2, creating file sysDmp&lt;/PRE&gt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;xMmmddyy&lt;/I&gt;&lt;/PRE&gt;&lt;PRE&gt;.z&lt;/PRE&gt;" 
&lt;LI&gt;From B5-Series &lt;A href="http://bit.ly/ZhdkE0" target="_blank" rel="nofollow noreferrer noopener"&gt;14793&lt;/A&gt;: "&lt;PRE&gt;Task IntProc(0x&lt;/PRE&gt;&amp;lt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;address&lt;/I&gt;&lt;/PRE&gt;&amp;gt;&lt;PRE&gt;) is suspended with error 2, creating file sysDmp&lt;/PRE&gt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;xMmmddyy&lt;/I&gt;&lt;/PRE&gt;&lt;PRE&gt;.z&lt;/PRE&gt;" 
&lt;/LI&gt;&lt;LI&gt;From C3/B3-Series &lt;A href="http://bit.ly/1p8nFr9" target="_blank" rel="nofollow noreferrer noopener"&gt;14755&lt;/A&gt;: "&lt;PRE&gt;Task CPLD_Status(0x&lt;/PRE&gt;&amp;lt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;address&lt;/I&gt;&lt;/PRE&gt;&amp;gt;&lt;PRE&gt;) is suspended with error 2, creating file sysDmp&lt;/PRE&gt;&lt;I&gt;&lt;/I&gt;&lt;PRE&gt;&lt;I&gt;xMmmddyy&lt;/I&gt;&lt;/PRE&gt;&lt;PRE&gt;.z&lt;/PRE&gt;" &lt;/LI&gt;&lt;/UL&gt;&lt;B&gt;Cause&lt;/B&gt;&lt;BR /&gt;
The passage of high-energy particles can trigger a table memory bit transition, which is detected as a memory parity error, which causes the table DMA to fail. The rate at which these errors have occurred is within the norms predicted to be observed in this class of silicon.&lt;BR /&gt;
&lt;BR /&gt;
The stated sequence of events will in all likelihood never occur on any given unit, but within a broad deployment of many such units, may well be experienced somewhere in the network.&lt;BR /&gt;
&lt;BR /&gt;
&lt;B&gt;Solution&lt;/B&gt;&lt;BR /&gt;
For the C5, C3, B5, or B3; upgrade to 6.61 firmware 6.61.13.0006 or higher.&lt;BR /&gt;
For the C5 or B5; upgrade to 6.71 firmware 6.71.05.0008 or higher.&lt;BR /&gt;
For the C5 or B5; upgrade to 6.81 firmware 6.81.02.0007 or higher.&lt;BR /&gt;
&lt;A href="https://extranet.extremenetworks.com/downloads" target="_blank" rel="nofollow noreferrer noopener"&gt;Release notes&lt;/A&gt; state, in the '&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Firmware Changes and Enhancements&lt;/PRE&gt;&lt;/DIV&gt;' section:&lt;BR /&gt;
&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;16086&lt;/PRE&gt;&lt;/DIV&gt;    &lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;Attempt to recover from a L2 table DMA error that previously resulted in a reset with a log entry of: "soc_l2x_thread DMA failed too many times". On an L2 Table DMA failure we will now walk the table to find the corrupted entry and remove it. The expected warning message is: "warning soc_l2x_thread: Bad L2 table entry found. Recovering".&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&lt;BR /&gt;
Upon detection of a parity error, the affected table entry is removed and a set of new messages is logged; for example:&lt;BR /&gt;
&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;May 15 16:04:31 0.0.0.0-1 SIM[99694928]: broad_hpc_drv.c(2686) 710 % warning soc_l2x_thread: DMA failed. Attempting recovery&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&amp;lt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;160&lt;/PRE&gt;&lt;/DIV&gt;&amp;gt;&lt;DIV class="threadCode"&gt;&lt;B&gt;code:&lt;/B&gt;&lt;PRE spellcheck="false"&gt;May 15 16:04:31 0.0.0.0-1 SIM[99694928]: broad_hpc_drv.c(2686) 711 % warning soc_l2x_thread: Bad L2 table entry found. Recovering&lt;/PRE&gt;&lt;/DIV&gt;&lt;BR /&gt;
&lt;BR /&gt;
Though with this fix there will be &lt;U&gt;no&lt;/U&gt; unit reset, do note that all traffic flowing through that unit will for a brief time be forwarded using the soft path (~ CPU) while the problematic table entry is being cleared.</description>
      <pubDate>Tue, 23 Dec 2014 22:43:00 GMT</pubDate>
      <guid>https://community.extremenetworks.com/t5/faqs/c5-c3-b5-b3-series-firmware-resolution-for-dma-error-reset/m-p/43034#M148</guid>
      <dc:creator>FAQ_User</dc:creator>
      <dc:date>2014-12-23T22:43:00Z</dc:date>
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