09-14-2019 08:04 AM
I've got a small Connect network with 3 x AP370s and 1 x AP250. The AP250 is stuck in a boot loop with orange LED showing all the time. Below is the output of the console during boot. Any ideas?
Using default environment
In: serial
Out: serial
Err: serial
Unlocking L2 Cache ...Done
arm_clk=1000MHz, axi_clk=500MHz, apb_clk=250MHz, arm_periph_clk=500MHz
Net: Registering eth
Broadcom BCM IPROC Ethernet driver 0.1
Using GMAC1 (0x18025000)
et0: ethHw_chipAttach: Chip ID: 0xcf12; phyaddr: 0x1e
bcm_robo_attach: devid: 0x53012
bcmiproc_eth-0
MAC address is c413:e215:6cc0
NVRAM_MAGIC found at offset 700000
nvram_init: ret 1
Reset TPM chip...
Reset AUTH chip...
Hit any key to stop autoboot: 0
Hit any key to interrupt boot from flash: 0
Loading kernel from device 0: nand0 (offset 0x800000) ... done
Loading rootfs from device 0: nand0 (offset 0x1600000) ...
U-Boot 2012.10 (Dec 20 2017 - 00:17:28)
I2C: ready
Wait.
Done.
DEV ID= 0000cf12
REV ID= 00000000
SKU ID = 0
OTP status: eca00018
MEMC 0 DDR speed = 800MHz
Log: ddr40_phy_init.c: Configuring DDR Controller PLLs
Log: offset = 0x18010800
Log: VCO_FREQ is 1600 which is greater than 1Ghz.
Log: DDR Phy PLL polling for lock
Log: DDR Phy PLL locked.
Log: ddr40_phy_init::DDR PHY step size calibration complete.
Log: ddr40_phy_init:: Virtual VttSetup onm CONNECT=0x01CF7FFF, OVERRIDE=0x00077FFF
Log: ddr40_phy_init:: Virtual Vtt Enabled
Log: DDR Controller PLL Configuration Complete
PHY register dump after DDR PHY init
PHY register dump after mode register write
DRAM: 512 MiB
WARNING: Caches not enabled
GPIO Init ... Done
Power Input Detection: POE AT, Drive GPIO17(USB 5V enable) success
NAND: NAND_FLASH_DEVICE_ID_ADDR = 18028194
Done that
(ONFI), S34ML04G2, blocks per lun: 1000 lun count: 1
128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND: chipsize
total 0 bad blocks,LIST:
now the up level will see a good flash chip no bad block which size is 20000000
before nvram partition, there are 0 bad blocks
512 MiB
Using default environment
In: serial
Out: serial
Err: serial
Unlocking L2 Cache ...Done
arm_clk=1000MHz, axi_clk=500MHz, apb_clk=250MHz, arm_periph_clk=500MHz
Net: Registering eth
Broadcom BCM IPROC Ethernet driver 0.1
Using GMAC1 (0x18025000)
et0: ethHw_chipAttach: Chip ID: 0xcf12; phyaddr: 0x1e
bcm_robo_attach: devid: 0x53012
bcmiproc_eth-0
MAC address is c413:e215:6cc0
NVRAM_MAGIC found at offset 700000
nvram_init: ret 1
Reset TPM chip...
Reset AUTH chip...
Hit any key to stop autoboot: 0
Hit any key to interrupt boot from flash: 0
Loading kernel from device 0: nand0 (offset 0x800000) ... done
Loading rootfs from device 0: nand0 (offset 0x1600000) ... done
## Booting kernel from Legacy Image at 01005000 ...
Image Name: Linux-3.16.36
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 2327241 Bytes = 2.2 MiB
Load Address: 80008000
Entry Point: 80008000
Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 02005000 ...
Image Name: uboot initramfs rootfs
Image Type: ARM Linux RAMDisk Image (uncompressed)
Data Size: 30883840 Bytes = 29.5 MiB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
Power off two PHY...
Loading Kernel Image ... OK
OK
boot_prep_linux commandline: root=/dev/ram console=ttyS0,9600 ramdisk_size=70000 cache-sram-size=0x10000
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
board_fixup: mem=512MB
L2C: platform provided aux values match the hardware, so have no effect. Please remove them.
L2C: platform provided aux values permit register corruption.
Mounting local file systems...
UBI device number 0, total 3256 LEBs (413433856 bytes, 394.3 MiB), available 75 LEBs (9523200 bytes, 9.1 MiB), LEB size 126976 bytes (124.0 KiB)
Updating system config database...
System config update complete.
kmpi: module license 'Aerohive Wireless Inc.' taints kernel.
Disabling lock debugging due to kernel taint
POE Input Detection -> AT
set attenuator GPIO 7b0d00->7b4d40
gmac_var_init: NAPI2_POLL mode
register snif device on interface eth0.
eth0: Broadcom BCM47XX 10/100/1000 Mbps Ethernet Controller 10.10.80.505_e5.1.2.3 (r659762)
register snif device on interface eth1.
eth1: Broadcom BCM47XX 10/100/1000 Mbps Ethernet Controller 10.10.80.505_e5.1.2.3 (r659762)
Unable to handle kernel paging request at virtual address 000026b8
pgd = dd70c000
[000026b8] *pgd=9d1e7831, *pte=00000000, *ppte=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP ARM
Modules linked in: wl(PO+) igs(PO) emf(PO) eth_drv(PO) ah_red(PO) ah_sec(PO) ah_board0(PO) kmpi(PO) ah_systop(O) ah_wl_shim(O)
CPU: 0 PID: 131 Comm: insmod Tainted: P O 3.16.36 #1
task: df5f73e0 ti: cd97e000 task.ti: cd97e000
PC is at awe_dos_ext_table_clean+0x8/0x1d8 [wl]
LR is at awe_dos_ext_table_clean+0x180/0x1d8 [wl]
pc : [<bf4a8a90>] lr : [<bf4a8c08>] psr: a0000013
sp : cd97fbd8 ip : 00000000 fp : 00000000
r10: dd4e6800 r9 : dd4dc400 r8 : 00000001
r7 : bf7bb01c r6 : 00000000 r5 : dd4e6800 r4 : 00000000
r3 : 000026b8 r2 : 00000000 r1 : 00000000 r0 : 00000000
Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 10c5387d Table: 9d70c04a DAC: 00000015
Process insmod (pid: 131, stack limit = 0xcd97e1b8)
Stack: (0xcd97fbd8 to 0xcd980000)
--- snip ---
lots of address blocks and stuff
-- /snip--
Kernel panic - not syncing: Fatal exception
CPU1: stopping
CPU: 1 PID: 0 Comm: swapper/1 Tainted: P D O 3.16.36 #1
[<c0011678>] (unwind_backtrace) from [<c000ce70>] (show_stack+0x10/0x14)
[<c000ce70>] (show_stack) from [<c043b7d8>] (dump_stack+0x7c/0x9c)
[<c043b7d8>] (dump_stack) from [<c000f8d0>] (handle_IPI+0x19c/0x1c8)
[<c000f8d0>] (handle_IPI) from [<c00086c8>] (gic_handle_irq+0x58/0x60)
[<c00086c8>] (gic_handle_irq) from [<c000d980>] (__irq_svc+0x40/0x74)
SMP: failed to stop secondary CPUs
97fc8)
7f80: ffffffed 00000000 00000000 00RebRebootinig in0 1s0 csecosnd.s.0.0000 00000000 df496000 c05d2338 c0443e88 00000000
7fa0: c05c7d10 00000000 00000000 ffffffed 00000000 df497fc8 c000aa64 c000aa68
7fc0: 60000013 ffffffff
[<c000d980>] (__irq_svc) from [<c000aa68>] (arch_cpu_idle+0x28/0x30)
[<c000aa68>] (arch_cpu_idle) from [<c00878d8>] (cpu_startup_entry+0x1b8/0x204)
[<c00878d8>] (cpu_startup_entry) from [<80008760>] (0x80008760)
U-Boot 2012.10 (Dec 20 2017 - 00:17:28)
I2C: ready
Wait.
Done.
DEV ID= 0000cf12
REV ID= 00000000
SKU ID = 0
OTP status: eca00018
MEMC 0 DDR speed = 800MHz
Log: ddr40_phy_init.c: Configuring DDR Controller PLLs
Log: offset = 0x18010800
Log: VCO_FREQ is 1600 which is greater than 1Ghz.
Log: DDR Phy PLL polling for lock
Log: DDR Phy PLL locked.
Log: ddr40_phy_init::DDR PHY step size calibration complete.
Log: ddr40_phy_init:: Virtual VttSetup onm CONNECT=0x01CF7FFF, OVERRIDE=0x00077FFF
Log: ddr40_phy_init:: Virtual Vtt Enabled
Log: DDR Controller PLL Configuration Complete
PHY register dump after DDR PHY init
PHY register dump after mode register write
DRAM: 512 MiB
WARNING: Caches not enabled
GPIO Init ... Done
Power Input Detection: POE AT, Drive GPIO17(USB 5V enable) success
NAND: NAND_FLASH_DEVICE_ID_ADDR = 18028194
Done that
(ONFI), S34ML04G2, blocks per lun: 1000 lun count: 1
128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND: chipsize
total 0 bad blocks,LIST:
now the up level will see a good flash chip no bad block which size is 20000000
before nvram partition, there are 0 bad blocks
512 MiB
Using default environment
and then it starts again ...
10-15-2023 09:36 AM
09-17-2019 12:20 PM
Of course, I've sent you an email with directions on how to open a one time courtesy case so we can assist you with that TFTP flash.
09-17-2019 06:35 AM
Thanks for that Sam. Unfortunately these are using Connect licenses and I don't have access to log a case. I can confirm that the boot can be interrupted at both of the possible prompts. Are you able to facilitate raising a case, either for TFTP or RMA? Thanks.
09-16-2019 12:22 PM
If you are able to interrupt the boot cycle when it prompts you to hit any key to stop the autoboot process, then you'll want to file a case with support so they can try a TFTP flash with you, to see if we can get the AP to stabilize. If you can't interrupt the boot cycle, then you'll want to file a case to request an RMA.